eXpLogic: Explaining Logic Types and Patterns in DiffLogic Networks
ITNG, 2025 · University of Florida
Award: Best Student Paper
Stephen Wormald
David Koblah
Matheus Kunzler Maldaner
Domenic Forte
Damon L. Woodard
What is eXpLogic?
eXpLogic is an algorithm that explains differentiable logic gate networks by tracing the circuit paths behind each prediction, then rendering them as saliency maps. Stephen Wormald led the work at the Florida Institute for National Security, and it won Best Student Paper at ITNG 2025. I am the third author.
Deep networks are hard to explain because every node blends thousands of weighted inputs into an opaque number. DiffLogic, an architecture where each node learns a distribution over logic gates, changes that. Once training ends, the network is a circuit, and circuits can be analyzed with tools computer engineers have trusted for decades. eXpLogic walks that learned circuit to show exactly which inputs drove a decision.
Stephen Wormald led the algorithm design and the paper itself, working with David Koblah, Dr. Domenic Forte, and Dr. Damon Woodard at the Florida Institute for National Security. I am the third of five authors. My work at FINS sits on the DiffLogic side of this research line, where I have trained and analyzed these networks on HiPerGator, UF's supercomputer. The premise is simple. If a model is made of logic gates, the gates can tell you what they did.
What are differentiable logic gate networks?
DiffLogic constrains every node in a deep network to represent one of sixteen real logic operations, such as AND, OR, or XOR, each with at most two inputs. After training, each node settles into a single gate, so the whole network reads as a circuit.
Continuous weights are what make standard networks hard to read. DiffLogic replaces each node with a learned choice among sixteen logic gate types. Training relaxes that choice into a differentiable distribution so gradients still flow, and inference collapses each node back to its most probable gate. Because every gate takes at most two inputs, the paths from any output back to the input pixels stay narrow enough for a person to follow.
I have worked on this architecture at FINS since fall 2023, after finding the original DiffLogic paper during a literature review. Late nights on HiPerGator taught me how these models train, where the bottlenecks hide, and what their logic traces look like once they converge. That work fed my undergraduate thesis and set up the question eXpLogic answers. We could see the gates. We wanted them to explain themselves.
Saliency maps built from circuit analysis
eXpLogic runs a breadth-first search, called FanIn, over every activation path upstream of a chosen output, tracking inversions and pruning weak paths by signal probability. The result is a saliency map marking inputs that mattered through presence and those that mattered through absence.
The core routine, FanIn, starts at a function of interest and searches backward through the circuit, following every activation path while tracking NOT gates so it knows whether a path responds to an input being on or off. Paths are pruned using signal probability, a measure of how often a gate's output goes high given its inputs, so the map keeps only the connections that shape the decision.
This produces three kinds of explanation. Local maps show the exact set of inputs responsible for a single prediction, which for binary inputs is a complete answer. Global maps surface input patterns that recur across a dataset, and class-specific maps show what a network looks for in each class. Local maps proved especially useful for debugging, since false positives and false negatives each come with comparable evidence for why the model fired. You can read the mistake.
Interactive demo: trace a decision through a live logic circuit
A tiny DiffLogic style network after training. Every node is a real logic gate, so the whole model is a circuit. Click pixels in the 4 by 4 grid to toggle them and watch signals flow to the two class outputs (each class scores how many of its three gates fire, and ties go to class A). Then press the button to run FanIn, the paper's breadth first backward trace: it walks from the winning output through every responsible gate and marks the pixels that decided the prediction. Solid outlines mean a pixel mattered by being on. Dashed outlines mean it mattered by being off, which FanIn catches because it tracks inversions along the way.
The SwitchDist metric
SwitchDist measures how far an input must move, following a saliency map's directions, before the model changes its predicted class. Lower is better. On binarized MNIST, eXpLogic maps flipped predictions after smaller perturbations than Vanilla Gradients or Integrated Gradients, two standard gradient-based attribution methods.
Evaluating saliency maps is its own research problem. Common deletion metrics accumulate changes in the class score, but for discrete predictions the score can sit unchanged until the class suddenly flips, which hides everything interesting. SwitchDist asks a blunter question. If the map is right about which inputs matter, perturbing those inputs should switch the prediction quickly, and the distance traveled before the switch becomes the score.
The paper tests this on binarized MNIST with two-layer DiffLogic networks of 2,500 nodes, comparing eXpLogic against Vanilla Gradients and Integrated Gradients. eXpLogic variants consistently reached the switch point in shorter distances. The pixels they highlighted were the ones the model actually depended on. The gradient baselines needed larger perturbations and behaved less consistently. For this architecture, reading the circuit beats differentiating through it.
Interactive demo: race a saliency map against random flips
Both panels start from the same 16 pixel input, fed to the same small logic gate network, which currently predicts one of two classes. The left panel follows the eXpLogic saliency map: each step it flips the marked pixel that most undermines the current prediction, turning off pixels that mattered by presence and turning on pixels that mattered by absence. The right panel flips pixels in a random order. Count the flips each side needs before the predicted class switches. That flip count is exactly what the SwitchDist metric measures, and lower is better.
In the paper, SwitchDist scored maps on binarized MNIST with two layer DiffLogic networks of 2,500 nodes. Perturbing inputs in the direction eXpLogic maps indicated switched the prediction after smaller changes than following Vanilla Gradients or Integrated Gradients, evidence that the circuit trace finds the pixels the model actually depends on.
Smaller networks, faster inference
Because eXpLogic identifies the activation paths behind each class, those paths can be carved out into a smaller network, called a MiniNet, that predicts one class on its own. This reduced network size by 87 percent and inference time by 8 percent, while class-specific accuracy dropped only 3.8 percent.
Explanations usually end at understanding. This one kept going. If a class-specific saliency map identifies every path that matters for recognizing a digit, the rest of the network is dead weight, and you can prune it away. The paper calls the result a MiniNet, a subnetwork extracted directly from the explanation.
The numbers were encouraging. MiniNets cut network size by 87 percent and inference time by 8 percent, at a cost of 3.8 percent in class-specific accuracy. Where a device only needs to detect one thing, that trade means loading a small fraction of the model into memory. The explanation and the optimization came from the same analysis. That is the part I find most satisfying.
Interactive demo: carve a MiniNet out of the circuit
The same toy circuit, holding a fixed sample input that it classifies as class A. Because eXpLogic already traced every activation path behind that class, anything off those paths is dead weight for a device that only needs to detect class A. Press the button to carve out the MiniNet: gates and wires that play no part in the class A decision fade away, and the readout reports what the paper measured when it did this for real on binarized MNIST DiffLogic networks.
Numbers from the paper's binarized MNIST experiments with two layer, 2,500 node DiffLogic networks: MiniNets cut network size by 87 percent and inference time by 8 percent while one versus all accuracy fell about 3.8 percent. The fade in this toy is gentler because the circuit is tiny; at scale, most of a network is off any single class's paths.
Best Student Paper at ITNG 2025
eXpLogic received the Best Student Paper Award at ITNG 2025, the International Conference on Information Technology New Generations. I presented the work in Las Vegas. The award recognized Stephen Wormald's lead effort and the lab's broader case that some architectures make explainability a design property.
Presenting in Las Vegas and hearing it named Best Student Paper was a proud moment for the whole group. The credit begins with Stephen Wormald, who drove the algorithm, the SwitchDist metric, and the writing, with guidance from Dr. Woodard and Dr. Forte. I am the third of five authors, and my work at FINS has been on the DiffLogic side of this research line, training and analyzing these networks on HiPerGator.
The award also validated an argument that runs through my own work, including my Summa Cum Laude undergraduate thesis on the same architecture. Explainability can be a property you choose when you pick the architecture, which matters in healthcare, defense, and law, where models must show their reasoning. Transparency is not negotiable in those settings. This paper is one piece of evidence that we do not have to give it up.
Abstract
Constraining deep neural networks (DNNs) to learn individual logic types per node, as performed using the DiffLogic network architecture, opens the door to model-specific explanation techniques that quell the complexity inherent to DNNs. Inspired by principles of circuit analysis from computer engineering, this work presents an algorithm (eXpLogic) for producing saliency maps which explain input patterns that activate certain functions. The eXpLogic explanations: (1) show the exact set of inputs responsible for a decision, which helps interpret false negative and false positive predictions, (2) highlight common input patterns that activate certain outputs, and (3) help reduce the network size to improve class-specific inference. To evaluate the eXpLogic saliency map, we introduce a metric that quantifies how much an input changes before switching a model's class prediction (the SwitchDist) and use this metric to compare eXpLogic against the Vanilla Gradients (VG) and Integrated Gradient (IG) methods. Generally, we show that eXpLogic saliency maps are better at predicting which inputs will change the class score. These maps help reduce the network size and inference times by 87% and 8%, respectively, while having a limited impact (-3.8%) on class-specific predictions. The broader value of this work to machine learning is in demonstrating how certain DNN architectures promote explainability, which is relevant to healthcare, defense, and law.
Frequently Asked Questions
What is a differentiable logic gate network?
A differentiable logic gate network, or DiffLogic network, is a deep network where each node learns to be one of sixteen two-input logic gates instead of a weighted sum. Training uses a continuous relaxation so gradients work, and the trained model discretizes into a real circuit, which makes it fast at inference and possible to analyze with circuit techniques.
How do you explain a neural network's decision?
The most common tools are gradient-based saliency methods like Vanilla Gradients, which score inputs by the gradient of the output, and Integrated Gradients, which averages gradients along a path from a baseline input. These work on any differentiable model but only approximate importance. eXpLogic instead exploits DiffLogic's structure to trace the exact gates and inputs behind a decision.
How much smaller can DiffLogic networks get with eXpLogic?
Class-specific MiniNets built from eXpLogic activation paths reduced network size by 87 percent, meaning only about a seventh of the model needs to be loaded into memory to predict one class. Inference time dropped 8 percent and one-versus-all accuracy fell from roughly 98 percent to about 95 percent on the binarized MNIST models tested.
Where was eXpLogic published?
eXpLogic appeared at ITNG 2025, the International Conference on Information Technology New Generations, where it won the Best Student Paper Award. The preprint is on arXiv as 2503.09910. The authors are Stephen Wormald, David Koblah, Matheus Kunzler Maldaner, Domenic Forte, and Damon L. Woodard of the University of Florida.
BibTeX
@inproceedings{wormald2025explogic,
title={eXpLogic: Explaining Logic Types and Patterns in DiffLogic Networks},
author={Wormald, Stephen and Koblah, David and Maldaner, Matheus Kunzler and Forte, Domenic and Woodard, Damon L.},
booktitle={Proceedings of the International Conference on Information Technology: New Generations (ITNG)},
year={2025}
}